PLBMaster.h from GreenSocs at Krugle

Show PLBMaster.h syntax highlighted

/*
Copyright (c) 2006 : Technical University of Braunschweig, Germany

All rights reserved.

Authors: Robert Guenzel, Wolfgang Klingauf, TU Braunschweig, E.I.S.

Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
met:

Redistributions of source code must retain the above copyright notice,
this list of conditions and the following disclaimer.  Redistributions
in binary form must reproduce the above copyright notice, this list of
conditions and the following disclaimer in the documentation and/or
other materials provided with the distribution.  Neither the name of
the Technical University of Braunschweig, Germany nor the names of its
contributors may be used to endorse or promote products derived from
this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/

#include <systemc.h>

#include "gstlm/tlm.h"
#include "protocol/PLB.h"
#include "userAPI/basicPorts.h"

using namespace tlm;
using namespace PLB;

#include <iomanip>
#define SHOW_SC_TIME_(module,msg) cout << "time " << std::setw(3) << sc_simulation_time() << ": " \
                                       << std::setw(6) << #module << ": " << msg
#define SHOW_SC_TIME(module,msg)  SHOW_SC_TIME_(module,msg) << endl

#define MEMSIZE 100


class PLBMaster : public sc_module
{
public:
  PLBMasterPort init_port;
  typedef PLBMasterPort::accessHandle accessHandle;
  typedef PLBMasterPort::phaseHandle phaseHandle;
  typedef PLBMasterPort::created_transaction_handle PLBTransactionHandle;

  unsigned char mem[MEMSIZE];

  void PLBMaster::sendPV(accessHandle );
  void PLBMaster::sendPVT(accessHandle );
  
  unsigned long long tadd;
  
  void test_wr();
  void test_rd();
public:
  //Constructor
  SC_HAS_PROCESS(PLBMaster);
  PLBMaster(sc_module_name name_, unsigned long long targetAddress, const char* data, bool rNw) : 
    sc_module(name_),init_port("iport") {
    tadd=targetAddress;
    strcpy((char *)(mem),data);
    cout<<"hello my name is "<<name()<<" and my port's id is "<<init_port.get_master_port_number()<<endl<<flush;
  
    if(rNw){
      SC_THREAD(test_rd);
      sensitive << init_port.default_event();
    }
    else{
      SC_THREAD(test_wr);
      sensitive << init_port.default_event();
    }
  }
};

void PLBMaster::test_rd(){
    accessHandle t1 = init_port.create_transaction();
    accessHandle tah;
    phaseHandle phase;

    t1->set_mCmd(Generic_MCMD_RD);
    t1->set_mAddr(tadd);
    t1->set_mBurstLength(strlen((char *)mem)+1);
    t1->set_mData(MasterDataType(&mem[0],strlen((char *)mem)+1));
    t1->set_mPrio(3);

    init_port.Request(t1);
    wait();
    tah=init_port.get_transactionHandle();
    phase=init_port.get_phase();

    if(phase.state==GenericPhase::RequestAccepted)
      cout<<sc_time_stamp()<<":"<<name()<<" master got reply!"<<endl<<flush;
    else
      SC_REPORT_ERROR(name(),"wrong phase");
    wait();
    tah=init_port.get_transactionHandle();
    phase=init_port.get_phase();
    tah->set_mPrio(3);
    if(phase.state==GenericPhase::ResponseValid){
      cout<<sc_time_stamp()<<" "<<name()<<" slave send  data!"<<endl<<flush;
    }
    else
      if(phase.state==GenericPhase::ResponseError){
        cout<<name()<<" at "<<sc_time_stamp()<<": Shit, my request timed out...  :-("<<endl<<flush;
        return;
      }
    else
      SC_REPORT_ERROR(name(),"wrong phase!");
    MasterDataType my_data;
    my_data.set(tah->get_sData());
    for (unsigned int i=0; i<tah->get_mBurstLength(); i++)
      cout<<my_data[i]<<flush;
    cout<<endl<<flush;

}

void PLBMaster::test_wr(){
    accessHandle t1 = init_port.create_transaction();
        
    accessHandle tah;
    phaseHandle phase;

    t1->set_mCmd(Generic_MCMD_WR);
    t1->set_mAddr(tadd);
    t1->set_mData(MasterDataType(&mem[0],strlen((char *)mem)+1));
    t1->set_mBurstLength(strlen((char *)mem)+1);
    t1->set_mPrio(3);

    init_port.Request(t1);
    wait();
    cout<<"HI"<<endl<<flush;
    tah=init_port.get_transactionHandle();
    phase=init_port.get_phase();
    cout<<"Phase: "<<phase.state<<endl<<flush;
    if(phase.state==GenericPhase::RequestAccepted)
      cout<<sc_time_stamp()<<":"<<name()<<" master got reply!"<<endl<<flush;
    else
      SC_REPORT_ERROR(name(),"wrong phase");

    init_port.SendData(t1,phase);
    wait();
    tah=init_port.get_transactionHandle();
    phase=init_port.get_phase();
    tah->set_mPrio(2);
    if(phase.state==GenericPhase::DataAccepted)
      cout<<sc_time_stamp()<<" "<<name()<<" slave accepted the data!"<<endl<<flush;
    else
      if(phase.state==GenericPhase::DataError){
        cout<<name()<<" at "<<sc_time_stamp()<<": Shit, my request timed out...  :-("<<endl<<flush;
        return;
      }      
      else
        SC_REPORT_ERROR(name(),"wrong phase");

}
See more files for this project here